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A Report Claimed That AMD Is Working On A Powerful Milan CPU Variant With 15 Tiles

AMD is working on a very incredible project Powerful Milan CPU Variant With 15 Tiles Coming

Thursday, September 5, 2019

/ by Theo Mason

  • AMD Is Working On A Powerful Milan CPU Variant With 15 Tiles
  • AMD Powerful Milan CPU Variant With 15 Tiles



On the news reaching us now, AMD is working on a very incredible project. According to a source, they're actively working on a 15 tile design for AMD Milan. Considering 1 of these tiles need to be an IO die, this implies that there will be at least one Milan variant with dies tiles compared to Rome’s 8.

AMD’s Powerful Milan CPU Variant Is Said To Have 15 Tiles Compared To Rome’s 9

As said, 8 channel DDR4 only has enough bandwidth available to optimally handle 10 CPU dies (80 CPU cores) at max. This means that you are looking at either an 8-die design (64 CPU Cores) or a 10-die design as far as the CPU side goes. Leaving the IO die aside, this leaves 6 or 4 tiles unaccounted for and these are probably going to end up as HBM. HBM can offer substantial speedup but this implies that this particular variant is going to be using an interposer. Let's cut the whole story short, this means, unless AMD chooses to delay this variant till DDR5, you are looking at either an 8+6+1 configuration (CPU + HBM + IO) or a 10+4+1 configuration (CPU + HBM + IO).

An interposer based design with HBM onboard would be able to offer much faster access and transfer times than traditional DDR-based memory where the DDR channel can act as a bottleneck. With the interconnect, IO and interposer the only bottleneck between the CPU cores and HBM memory (pardon the redundancy), this is going to result in some significant speedups for applications that rely heavily on memory in view of this standard is going to result in a faster memory standard than the one we have currently (RAM).

Although previous leaks have indicated that AMD Milan having an 8+1 design which means this particular variant, could mean that Milan really has two variants: an exotic one and a normal compute focused one. It is also worth mentioning that the primary reason we think AMD is going with an HBM integrated design is because of the limitations of DDR4, something DDR5 could potentially resolve. That is all for now.

This news first appeared on Wccftech written by Usman Pirzada.

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